The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2026

Filed:

Oct. 17, 2024
Applicant:

Micro Control Company, Fridley, MN (US);

Inventors:

Kevin Roland Deters, Andover, MN (US);

Philip Alan Bailey, Marine on St. Croix, MN (US);

Assignee:

Micro Control Company, Fridley, MN (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/30 (2006.01); G01R 31/28 (2006.01); G05F 1/46 (2006.01); G05F 1/66 (2006.01); H02J 1/10 (2026.01); H03K 3/017 (2006.01);
U.S. Cl.
CPC ...
H03K 3/017 (2013.01); G01R 31/2863 (2013.01); G01R 31/3004 (2013.01); G05F 1/46 (2013.01); G05F 1/66 (2013.01); H02J 1/10 (2013.01);
Abstract

A semiconductor burn-in board configured for insertion into a chamber of a semiconductor burn-in machine includes a power regulator board and a testing board. The power regulator board includes a main power connector configured to receive main power from a semiconductor burn-in machine, a plurality of power supplies each configured to receive the main power from the main power connector and convert the main power to test power, and a pair of test power connectors for each power supply. The testing board is attached to the power regulator board and includes a plurality of device testing units. Each device testing unit is configured to receive the test power from at least one of the power supplies through at least one pair of the test power connectors and apply test signals to a semiconductor device received in the device testing unit.


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