The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2026

Filed:

Nov. 21, 2023
Applicant:

Nordic Semiconductor Asa, Trondheim, NO;

Inventors:

Aram Baharmast, Oulu, FI;

Jarmo Väänänen, Oulu, FI;

Assignee:

NORDIC SEMICONDUCTOR ASA, Trondheim, NO;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); H03F 1/02 (2006.01); H03K 5/22 (2006.01);
U.S. Cl.
CPC ...
H03F 3/4521 (2013.01); H03F 3/45273 (2013.01); H03F 3/4565 (2013.01); H03F 2203/45644 (2013.01); H03F 2203/45658 (2013.01);
Abstract

According to an aspect, there is provided a comparator comprising input terminals, first, second and third biasing current sources configured to output first, second and third biasing currents, an input circuit driven by the first biasing current source and comprising an amplification circuit and a load circuit configured to provide positive feedback for the amplification circuit, first and second current mirroring circuits for forming, with the input circuit, first and second current mirrors producing first and second current mode signals, first and second current-controlled driver circuits configured to be controlled by the second and third biasing currents, respectively, and the first and second current mode signals, respectively, a latch circuit comprising first and second cross-coupled complementary metal-oxide semiconductor transistors acting as a latch having substantially rail-to-rail output voltage swing and being driven, respectively, by the first and second current-controlled driver circuits and an output circuit implementing a current starved inverter.


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