The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2026

Filed:

Nov. 25, 2024
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Minwoo Byun, Yongin-si, KR;

Minjoo Kim, Yongin-si, KR;

Seoni Jeong, Yongin-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3266 (2016.01); G09G 3/3233 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); G09G 3/3233 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0852 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01); G09G 2320/045 (2013.01);
Abstract

A driver includes a plurality of stages. At least one stage includes: an input circuit configured to transfer an input signal to a Q node in response to a first clock signal, where the Q node includes a first Q node and a second Q node; a QB node controlling circuit configured to control a voltage of a QB node based on a voltage of the first Q node and a QB control signal; an output circuit configured to output an output signal, which has a high gate voltage, based on a voltage of the second Q node, and configured to output the output signal, which has a low gate voltage, based on the voltage of the QB node; and a QB node discharging circuit configured to discharge the QB node when the high gate voltage and the low gate voltage are deactivated.


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