Self-learning asymmetric bit-flipping decoder for memory devices

Abstract

Systems and methods for improving performance of a memory device, which includes a bit-flipping (BF) decoder, are described. The disclosed embodiments improve the performance of the memory device by selecting parameters for the BF decoder that are optimized for current conditions of the memory device An example method includes performing a first number of decoding iterations on a received codeword, tracking the number of bit errors during the decoding, and determining, based thereon, an asymmetric ratio associated with the codeword. The method further includes determining, based on the asymmetric ratio and a checksum associated with the codeword, a current set of parameters for configuring the BF decoder, and performing a second number of decoding iterations on the codeword to generate data that was encoded. An example system includes the BF decoder and a memory controller that are configured to perform the above-described method.