The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 2026

Filed:

Nov. 17, 2022
Applicant:

Qorvo Us, Inc., Greensboro, NC (US);

Inventors:

Julio C. Costa, Oak Ridge, NC (US);

Robert L. Sowell, III, Greensboro, NC (US);

Assignee:

Qorvo US, Inc., Greensboro, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2023.01); B81B 7/00 (2006.01); B81C 1/00 (2006.01); H10W 70/05 (2026.01); H10W 70/65 (2026.01); H10W 70/685 (2026.01); H10W 74/01 (2026.01); H10W 90/00 (2026.01); H10W 72/00 (2026.01); H10W 72/20 (2026.01); H10W 74/00 (2026.01); H10W 74/10 (2026.01); H10W 74/40 (2026.01); H10W 90/20 (2026.01); H10W 90/24 (2026.01);
U.S. Cl.
CPC ...
H10W 90/00 (2026.01); B81B 7/0074 (2013.01); B81C 1/00301 (2013.01); H10W 70/05 (2026.01); H10W 70/093 (2026.01); H10W 70/65 (2026.01); H10W 70/685 (2026.01); H10W 74/016 (2026.01); H10W 90/701 (2026.01); B81B 2207/012 (2013.01); B81B 2207/07 (2013.01); B81B 2207/092 (2013.01); B81B 2207/094 (2013.01); B81B 2207/097 (2013.01); B81C 2203/032 (2013.01); B81C 2203/035 (2013.01); B81C 2203/0771 (2013.01); H10W 72/01 (2026.01); H10W 72/07253 (2026.01); H10W 72/234 (2026.01); H10W 72/252 (2026.01); H10W 72/823 (2026.01); H10W 72/856 (2026.01); H10W 72/877 (2026.01); H10W 74/00 (2026.01); H10W 74/10 (2026.01); H10W 74/40 (2026.01); H10W 90/20 (2026.01); H10W 90/24 (2026.01); H10W 90/722 (2026.01); H10W 90/724 (2026.01); H10W 90/732 (2026.01);
Abstract

The present disclosure describes a process for making a three-dimensional (3D) package, which starts with providing a mold precursor module that includes a first device die and a floor connectivity die (FCD) encapsulated by a mold compound. The FCD includes a sacrificial die body and multiple floor interconnections underneath the sacrificial die body. Next, the mold compound is thinned down until the sacrificial die body of the FCD is completely consumed, such that each floor interconnection is exposed through the mold compound. The thinning down step does not affect a device layer in the first device die. A second device die, which includes a die body and multiple electrical die interconnections, is then mounted over the exposed floor interconnections. Herein, each electrical die interconnection is vertically aligned with and electrically connected to a corresponding floor interconnection from the FCD.


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