The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 23, 2026
Filed:
Sep. 29, 2022
Hefei Xinsheng Optoelectronics Technology Co., Ltd., Hefei, CN;
Boe Technology Group Co., Ltd., Beijing, CN;
Leilei Cheng, Beijing, CN;
Cheng Xu, Beijing, CN;
Jie Liu, Beijing, CN;
Bin Zhou, Beijing, CN;
Liangchen Yan, Beijing, CN;
Haitao Wang, Beijing, CN;
Ao Sheng, Beijing, CN;
HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., Hefei, CN;
BOE TECHNOLOGY GROUP CO., LTD., Beijing, CN;
Abstract
Embodiments of the present disclosure provide an array substrate and a related display panel and a method of manufacturing thereof. An array substrate comprises: a substrate; a first light-shielding layer; a first dielectric layer which comprises a first opening; a transistor, which comprises an active layer with a first source/drain region, a second source/drain region, and a channel region; a second dielectric layer, which comprises a second opening, wherein a second projection of the second opening on the substrate at least partially overlaps with a first projection of the first opening on the substrate; a first conductive layer; a third dielectric layer, which comprises a third opening, wherein a third projection of the third dielectric layer on the substrate at least partially overlaps with the first projection and the second projection; a fourth dielectric layer, which comprises a fourth opening, wherein a fourth projection of the fourth dielectric layer on the substrate at least partially overlaps with the first projection of the first opening, the second projection of the second opening, and the third projection of the third opening; and a second conductive layer.