The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 2026

Filed:

Sep. 26, 2023
Applicant:

Em Microelectronic-marin SA, Marin, CH;

Inventors:

Lubomir Plavec, Brno, CZ;

Yves Godat, Cornaux, CH;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/10 (2006.01); G11C 8/08 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
G11C 8/10 (2013.01); G11C 8/08 (2013.01); H03K 19/20 (2013.01);
Abstract

An address decoder unit () for a memory cell array (), the address decoder unit () including an address decoder () including an address input () and a number of address outputs (), the address decoder () being operable to select one of the address outputs () in response to receive a memory address at the address input (); and an address selection circuitry () connected to the address decoder () and including a number of address selection outputs () each of which connectable the memory cell array and each of which corresponding to one memory address, wherein the address decoder unit () is switchable into a memory erase mode, in which the address selection circuitry () is operable to select all address selection outputs () of an address space above or beyond a memory address provided at the address input ().


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