The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 23, 2026

Filed:

Jul. 12, 2024
Applicant:

Sandisk Technologies, Inc., Milpitas, CA (US);

Inventors:

Xuan Tian, Shanghai, CN;

Liang Li, Shanghai, CN;

Vincent Yin, Shanghai, CN;

Assignee:

Sandisk Technologies, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01); G06F 2212/7201 (2013.01);
Abstract

Technology for hybrid block management for dynamic SLC verify. The memory system tracks multi-level cell (MLC) programming speed of candidate pages in a three-dimensional NAND memory structure. The memory system determines whether each respective candidate page is eligible for single-level cell (SLC) programming without program verify based on the MLC programming speed. The memory system then programs the candidate pages based on the determination. The memory system may maintain a bitmap that specifies whether a particular candidate page is to receive program verify or not for SLC programming. In one aspect, the MLC programming speed is tracked by noting the number of program pulses used to complete MLC programming.


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