The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2026

Filed:

Apr. 19, 2024
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventor:

Nam Jae Lee, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 43/27 (2023.01); H10B 41/27 (2023.01); H10B 41/41 (2023.01); H10B 43/40 (2023.01); H10W 90/00 (2026.01); H10W 72/00 (2026.01);
U.S. Cl.
CPC ...
H10W 90/00 (2026.01); H10B 41/27 (2023.02); H10B 41/41 (2023.02); H10B 43/27 (2023.02); H10B 43/40 (2023.02); H10W 72/07331 (2026.01); H10W 90/732 (2026.01);
Abstract

There are provided a semiconductor memory device and a manufacturing method of a semiconductor memory device. The semiconductor memory device includes: a peripheral circuit layer; a bonding structure disposed on the peripheral circuit layer; a channel structure disposed on the bonding structure; a first gate contact structure including a first vertical part penetrating the bonding structure and a first horizontal part intersecting with the first vertical part and extending from the first vertical part; and a first gate conductive pattern in contact with a sidewall of the first horizontal part, the first gate conductive pattern being spaced apart from the first vertical part, the first gate conductive pattern extending to surround the channel structure.


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