The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2026

Filed:

Jun. 30, 2023
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Harshpreet Singh Phull Bakshi, Dallas, TX (US);

Sylvester Ankamah-Kusi, Dallas, TX (US);

Siraj Akhtar, Dallas, TX (US);

Rajen Manicon Murugan, Dallas, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/64 (2006.01); H01L 21/02 (2006.01); H01L 21/288 (2006.01); H01L 21/3205 (2006.01); H01L 21/56 (2006.01); H01L 21/768 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 25/16 (2023.01);
U.S. Cl.
CPC ...
H01L 23/645 (2013.01); H01L 21/022 (2013.01); H01L 21/288 (2013.01); H01L 21/3205 (2013.01); H01L 21/565 (2013.01); H01L 21/76877 (2013.01); H01L 23/3107 (2013.01); H01L 23/49816 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 25/16 (2013.01);
Abstract

In examples, a semiconductor package comprises a conductive terminal; a semiconductor die including a device side having circuitry formed therein, the device side facing toward the conductive terminal; and a substrate coupled to the conductive terminal and to the device side of the semiconductor die. The substrate includes a first metal layer coupled to first and second vias extending toward and coupled to either the device side of the semiconductor die or the conductive terminal. The substrate includes a second metal layer electrically isolated from the first metal layer by an insulation layer between the first and second metal layers, the second metal layer coupled to a third via extending toward and coupled to either the conductive terminal or the semiconductor die. The first and second metal layers form a Marchand balun.


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