The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2026

Filed:

Nov. 11, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Sang-Lok Kim, Seoul, KR;

Sang Soo Park, Hwaseong-si, KR;

Jung-June Park, Seoul, KR;

Su Chang Jeon, Seoul, KR;

Sung-Min Joe, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 43/40 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10B 43/40 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02); H10W 90/00 (2026.01);
Abstract

Disclosed are semiconductor devices and semiconductor packages. The semiconductor device comprises a semiconductor substrate that includes a stack region and a pad region, a peripheral circuit structure that includes a plurality of peripheral circuits on the semiconductor substrate, a cell array structure on the peripheral circuit structure, and a redistribution layer on the cell array structure and including a redistribution dielectric layer and a redistribution pattern on the redistribution dielectric layer. The redistribution dielectric layer covers an uppermost conductive pattern of the cell array structure. The redistribution pattern is connected to the uppermost conductive pattern. A thickness in a vertical direction of the redistribution layer on the pad region is greater than that of the redistribution layer on the stack region.


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