The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2026

Filed:

Dec. 12, 2023
Applicant:

Lx Semicon Co., Ltd., Daejeon, KR;

Inventors:

Won Joon Hwang, Daejeon, KR;

Byung Jun Seo, Daejeon, KR;

Ju Hyun Lee, Daejeon, KR;

Assignee:

LX SEMICON CO., LTD., Daejeon, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/46 (2006.01);
U.S. Cl.
CPC ...
H03M 1/466 (2013.01); H03M 1/462 (2013.01); H03M 1/468 (2013.01);
Abstract

The present disclosure relates to an analog-to-digital converter that reduces power consumption by reducing an operating current and a semiconductor device having the same. The analog-to-digital converter includes a capacitor-resistor (C-R) hybrid digital-to-analog converter (DAC) circuit including a capacitor digital-to-analog converter (CDAC) circuit including a capacitor array, and a resistor digital-to-analog converter (RDAC) circuit including a resistor string, a comparator that compares an output voltage of the C-R hybrid DAC circuit with a common mode voltage and outputs a comparison result, and a control logic circuit that controls a switch operation of the C-R hybrid DAC circuit and the comparison operation of the comparator using a driving clock with a duty cycle greater than a duty cycle of the first clock based on a system clock, and determines each bit of digital data by receiving the comparison result of the comparator.


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