The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2026

Filed:

May. 23, 2024
Applicant:

Realtek Semiconductor Corporation, Hsinchu, TW;

Inventors:

Yu-Tung Liao, Hsinchu, TW;

Cheng-Hsien Li, Hsinchu, TW;

Tsung-En Wu, Hsinchu, TW;

Bo-Rong Huang, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/00 (2006.01); H03M 1/10 (2006.01);
U.S. Cl.
CPC ...
H03M 1/1014 (2013.01);
Abstract

A time-interleaved analog-to-digital converter includes sampling circuits, amplifier circuits, analog-to-digital converter circuits, and a detector circuitry. The sampling circuits are configured to sample an input signal according to first clock signals, to generate first signals. The amplifier circuits are configured to generate second signals according to the first signals. The analog-to-digital converter circuits are configured to convert the second signals to generate digital signals. The detector circuitry is configured to adjust a delay time of each of the first clock signals, and calibrate gains of the amplifier circuits according to the digital signals.


Find Patent Forward Citations

Liao, Yu-Tung. (2026). Time interleaved analog to digital converter and gain calibration method (U.S. Patent No. 12658933). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12658933

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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