The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 16, 2026
Filed:
Sep. 11, 2024
Applicant:
Apple Inc., Cupertino, CA (US);
Inventors:
Ankit Srivastava, San Diego, CA (US);
Ahmed I Hussein, San Jose, CA (US);
Assignee:
Apple Inc., Cupertino, CA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/197 (2006.01); H03K 5/134 (2014.01); H03L 7/093 (2006.01); H03L 7/099 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03L 7/1976 (2013.01); H03K 5/134 (2014.07); H03L 7/093 (2013.01); H03L 7/099 (2013.01); H03K 2005/00052 (2013.01);
Abstract
Phase-locked loop circuitry is provided that includes a time-to-digital converter, a first frequency divider circuit coupled to an output of the time-to-digital converter, and a second frequency divider circuit coupled between the first frequency divider circuit and an input of the time-to-digital converter and having a phase interpolator with a plurality of delay circuits forming a first digital-to-analog converter (DAC) circuit and a second digital-to-analog converter (DAC) circuit separate from the first DAC circuit. The phase interpolator can be calibrated using the time-to-digital converter.