The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 16, 2026
Filed:
Nov. 27, 2024
Apple Inc., Cupertino, CA (US);
Battaje Vimalesh Rao, San Marcos, CA (US);
Jacob S Schneider, San Diego, CA (US);
Hanan Cohen, San Diego, CA (US);
Apple Inc., Cupertino, CA (US);
Abstract
A circuit for reducing duty cycle distortion of a clock signal includes an amplifier configured to receive an input clock signal and generate an amplified clock signal. The circuit also includes a filter coupled to the amplifier and configured to generate a filtered clock signal based on the amplified clock signal. The circuit also includes a gating circuit coupled to the filter and configured to receive the filtered clock signal and selectively output the filter clock signal responsive to a first control signal. The circuit also includes a control circuit coupled to the gating circuit and the filter, where the control circuit is configured to receive a timing signal, receive an enable signal, and generate the first and a second control signal based on the timing and enable signals. The second control signal alters impedance of a feedback path of the filter.