The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2026

Filed:

Jan. 11, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Juil Choi, Suwon-si, KR;

Jusuk Kang, Suwon-si, KR;

Hyungjun Park, Suwon-si, KR;

Sanghyuck Oh, Suwon-si, KR;

Hyunju Lee, Suwon-si, KR;

Sangyeol Choi, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H10B 80/00 (2023.01); H10W 70/60 (2026.01); H10W 70/685 (2026.01); H10W 74/10 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 70/611 (2026.01); H10B 80/00 (2023.02); H10W 70/685 (2026.01); H10W 74/117 (2026.01); H10W 90/701 (2026.01);
Abstract

Provided are a semiconductor package having a structure maximizing heat dissipation efficiency and a method of manufacturing the same. The semiconductor package includes a first redistribution substrate, a first semiconductor chip on the first redistribution substrate, a plurality of through posts on the first redistribution substrate, around the first semiconductor chip, and a second redistribution substrate located over the first semiconductor chip and the through posts, wherein a top surface of the first semiconductor chip is in contact with a bottom surface of the second redistribution substrate.


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