Semiconductor devices having landing pad structures

Abstract

A semiconductor device includes a substrate having an active region; a gate structure in the substrate, crossing the active region, and extending in a first horizontal direction; bit line structures crossing the gate structure and extending in a second horizontal direction, intersecting the first horizontal direction; a contact plug between the bit line structures; a landing pad structure on the contact plug and including a lower landing pad and an upper landing pad on the lower landing pad, wherein the lower landing pad includes a barrier layer and a metal layer on the barrier layer; and an insulating pattern on the lower landing pad and contacting a side surface of the upper landing pad. The upper landing pad is integrally coupled to the metal layer. A side surface of the insulating pattern includes a concave curved surface toward an adjacent bit line structure among the bit line structures.