The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 09, 2026
Filed:
Dec. 05, 2024
Qualcomm Incorporated, San Diego, CA (US);
Anand Meruva, San Diego, CA (US);
Prince Mathew, San Diego, CA (US);
Jeffrey Mark Hinrichs, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
A delay locked loop (DLL) includes a phase detector having a first input, a second input, and an output, and a first delay path coupled between an input of the DLL and the first input of the phase detector, wherein the first delay path includes a first delay circuit. The first delay circuit includes first delay buffers coupled in series and load capacitors, wherein each of the load capacitors is coupled to an output of a respective one of the first delay buffers. The DLL also includes a second delay path coupled between the input of the DLL and the second input of the phase detector, wherein the second delay path includes a one-cycle delay circuit and a second delay circuit coupled in series. The DLL also includes a control circuit coupled to the output of the phase detector, the first delay circuit, and the second delay circuit.