The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 09, 2026
Filed:
Apr. 18, 2023
Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;
Kemal S. Demirci, Dallas, TX (US);
Tian Zhao, Austin, TX (US);
Jeffrey A. May, Dripping Springs, TX (US);
Theodore M. Burk, Cedar Park, TX (US);
Thomas H. Hoff, Austin, TX (US);
Edward M. Veeser, Austin, TX (US);
Cirrus Logic Inc., Austin, TX (US);
Abstract
This application relates to methods and apparatus for power limiting for amplifiers. An amplifier is configured to receive an input supply voltage and to draw, in use, an amplifier input current resulting in an amplifier input power. A power limiter is configured to monitor an indication of the amplifier input power, determine a first signal limit based on said indication of the amplifier input power and a pre-set limit and apply regulation to the input signal to provide a regulated input signal for input to the amplifier that does not exceed the first signal limit.