Atomic update instructions with bit masking

Abstract

A masked atomic update instruction is described that atomically performs compare and exchange operations on select bits of a data structure. Executing the masked atomic update instruction compares respective source values with respective values of bits stored at a destination data storage location. If the respective bit values match, one or more of the respective bit values at the destination are replaced with one or more defined replacement values. Alternatively, if the respective bit values do not match, the destination is not modified. The masked atomic update instruction enables a processing unit to mask out bits of the destination data storage location that are not involved in the comparison or update. The masked atomic update instruction thus provides bit-level granularity by which another thread is prevented from accessing bits of the destination data storage location. This bit-level granularity advantageously permits multiple threads to simultaneously access a common data storage location.