The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 09, 2026
Filed:
Sep. 16, 2024
Nxp B.v., Eindhoven, NL;
Sandeep Kumar Arya, Bangalore, IN;
Hemant Nautiyal, Greater Noida, IN;
Aastha Shukla, Noida, IN;
Geeta Ahuja, Hisar, IN;
NXP B.V., Eindhoven, NL;
Abstract
An error out (EOUT) controller of a system on a chip (SoC) for fault management generates a first EOUT signal which indicates a virtual electronic control unit (vECU) of the SoC comprising a plurality of vECU is in a first state. The first EOUT signal is output, where the first EOUT signal is toggled at a first toggle frequency. A fault signal which indicates the vECU having a fault is received. Based on receiving the fault signal, an EOUT circuit is selected from a plurality of EOUT circuits and the selected EOUT circuit generates a second EOUT signal which indicates the vECU is in a second state. The second EOUT signal is then output, where the second EOUT signal is a toggled at a second toggle frequency or is a static signal.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile