The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2026

Filed:

Mar. 27, 2023
Applicant:

Skyworks Solutions, Inc., Irvine, CA (US);

Inventors:

Takanori Yasuda, Nara, JP;

Siarhei Dmitrievich Barsukou, Takarazuka, JP;

Keiichi Maki, Suita, JP;

Hiroyuki Nakamura, Osaka-Fu, JP;

Assignee:

Skyworks Solutions, Inc., Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 70/68 (2026.01); B81B 7/00 (2006.01); H04R 17/02 (2006.01); H05K 1/03 (2006.01); H05K 5/00 (2025.01); H10W 44/20 (2026.01); H10W 70/685 (2026.01); H10W 70/692 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 70/68 (2026.01); B81B 7/0061 (2013.01); H05K 1/0306 (2013.01); H05K 5/0052 (2013.01); H05K 5/0065 (2013.01); H10W 70/692 (2026.01); H10W 90/00 (2026.01); B81B 2207/012 (2013.01); B81B 2207/096 (2013.01); H04R 17/02 (2013.01); H04R 2201/003 (2013.01); H05K 2201/068 (2013.01); H05K 2201/10083 (2013.01); H10W 44/20 (2026.01); H10W 70/681 (2026.01); H10W 70/685 (2026.01); H10W 90/734 (2026.01); H10W 90/753 (2026.01); H10W 90/754 (2026.01);
Abstract

An integrated device package is disclosed. The integrated device package can include a printed circuit board and a microelectronicmechanical systems die that is at least partially disposed within the printed circuit board and electrically coupled to the printed circuit board. The integrated device package can include a filler material that is at least partially disposed between the microelectronicmechanical systems die and the printed circuit board. The integrated device package can include a lid that is coupled to the printed circuit board. The lid and the microelectronicmechanical systems die are spaced by a gap defining a back volume.


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