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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12648182 B1

PDFFull Text
Date of Patent:
Jun. 02, 2026

Filed:

Mar. 22, 2023

Display panel and method of manufacturing the same

Applicant:

Samsung Display Co., Ltd., Yongin-Si, KR;

Inventors:

Hyun Kim, Yongin-si, KR;

Shoyeon Kim, Yongin-si, KR;

Seul-Ki Kim, Yongin-si, KR;

Kap Soo Yoon, Yongin-si, KR;

Jaehyun Lee, Yongin-si, KR;

Seung-Ha Choi, Yongin-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-Si, KR;

Attorney:

Innovation Counsel LLP

Primary Examiner:

Victoria K Hall

Int. Cl.
CPC ...
H10K 59/124 (2023.01); H10D 30/67 (2025.01); H10D 86/01 (2025.01); H10D 86/40 (2025.01); H10D 86/60 (2025.01); H10K 59/12 (2023.01); H10K 59/121 (2023.01); H10K 102/00 (2023.01);
U.S. Cl.
CPC ...
H10D 30/6736 (2025.01); H10D 30/6729 (2025.01); H10D 30/6757 (2025.01); H10D 86/0231 (2025.01); H10D 86/421 (2025.01); H10D 86/443 (2025.01); H10D 86/451 (2025.01); H10D 86/60 (2025.01); H10K 59/1201 (2023.02); H10K 59/1213 (2023.02); H10K 59/124 (2023.02); H10K 2102/351 (2023.02);
Abstract

A display panel includes a base substrate, a transistor disposed on the base substrate and including a semiconductor pattern including a source area, a drain area, and an active area, a gate insulating pattern layer disposed on the semiconductor pattern, and a gate electrode disposed on the gate insulating pattern, and connection electrodes disposed on the gate insulating pattern layer and connected to the semiconductor pattern through contact holes, respectively. The gate insulating pattern layer includes a first portion overlapping at least one of the source area and the drain area and a second portion extending from the first portion. A thickness of the first portion is equal to or smaller than about 50% of a thickness of the second portion.

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