The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2026

Filed:

Sep. 26, 2024
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventor:

Hiroyuki Muto, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 25/772 (2023.01); H04N 23/56 (2023.01); H04N 25/47 (2023.01); H04N 25/705 (2023.01); H04N 25/76 (2023.01); H04N 25/773 (2023.01);
U.S. Cl.
CPC ...
H04N 25/772 (2023.01); H04N 23/56 (2023.01); H04N 25/47 (2023.01); H04N 25/705 (2023.01); H04N 25/7795 (2023.01);
Abstract

A time to digital conversion circuit includes a pulse signal generator configured to generate a pulse signal in response to activation of a transition detection signal, a latch circuit configured to latch a multiphase clock signal in response to a trailing edge of the pulse signal, an upper time to digital converter (TDC) configured to latch, in response to activation of a timing signal, a code whose value changes at the same period as a period of the multiphase clock signal, and a synchronization circuit. The latch circuit forms a lower TDC. The synchronization circuit supplies a signal synchronized by receiving the transition detection signal at a timing decided in accordance with a signal generated by the lower TDC as the timing signal to the upper TDC.


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