The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2026

Filed:

Dec. 20, 2023
Applicant:

Sandisk Technologies, Inc., Milpitas, CA (US);

Inventors:

Yuki Fujita, Yokohama, JP;

Kei Kitamura, Chigasaki, JP;

Takayuki Inoue, Fujisawa, JP;

Assignee:

Sandisk Technologies, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G11C 16/102 (2013.01); G11C 16/3404 (2013.01);
Abstract

The memory device includes a memory block with an array of memory cells that are arranged in a plurality of word lines. The memory device also includes circuitry that is configured to program the memory cells of a selected word line of the plurality of word lines in a plurality of program loops. During at least one of the program loops, the circuitry is configured to apply a programming pulse and at least one verify pulse to the selected word line, then determine a number of memory cells to be verified to establish a verify count, and then compare the verify count to a predetermined threshold count. The circuitry then sets at least one bit scan pass fail (BSPF) criteria based on the comparison of the verify count to the predetermined threshold count.


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