The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2026
Filed:
May. 06, 2025
Apple Inc., Cupertino, CA (US);
Dongqi Zheng, San Diego, CA (US);
Chin-Wei Lin, San Jose, CA (US);
Szu-Hsien Lee, Los Gatos, CA (US);
Shinya Ono, Santa Clara, CA (US);
Gihoon Choo, San Jose, CA (US);
Gunhee Kim, Santa Clara, CA (US);
Tsung-Ting Tsai, San Jose, CA (US);
Pei-En Chang, San Jose, CA (US);
Ting-Kuo Chang, San Jose, CA (US);
Apple Inc., Cupertino, CA (US);
Abstract
A display may include an array of pixels that receive control signals from a chain of gate drivers. Each gate driver may include a first complementary inverter configured to receive a carry in signal, a second complementary inverter having an input coupled to the first complementary inverter and having an output at which a carry out signal is produced, and an output buffer subcircuit coupled to the input of the second complementary inverter. The output buffer subcircuit can include a first output buffer transistor coupled in series with a second output buffer transistor. The first complementary inverter can receive the carry in signal through a transmission gate that is controlled by two shift register clock signals.