The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2026

Filed:

May. 30, 2024
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Rajamani Sethuram, San Jose, CA (US);

Ramanathan Bhagavathiperumal, Fremont, CA (US);

Surya Sasi Kiran Tallapragada, Folsom, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/36 (2006.01); H04L 49/00 (2022.01);
U.S. Cl.
CPC ...
G06F 13/36 (2013.01); H04L 49/3063 (2013.01); G06F 2213/40 (2013.01);
Abstract

Certain aspects of the present disclosure provide techniques and apparatus for latency balancing in a streaming scan network (SSN) on an integrated circuit. Embodiments include receiving, at a programmable block on the integrated circuit, an indication of a number of pipeline stages to be used for a test operation in the SSN. Embodiments include selecting, by the programmable block, based on the indication, a subset of a plurality of pipeline stages in the programmable block using a multiplexer. Embodiments include balancing latency throughout the SSN on the integrated circuit based on the selected subset of the plurality of pipeline stages in the programmable block.


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