The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2026

Filed:

Sep. 30, 2021
Applicant:

Amazon Technologies, Inc., Seattle, WA (US);

Inventors:

Ron Diamant, San Jose, CA (US);

Yunxuan Yu, Sunnyvale, CA (US);

Taylor Goodhart, Snohomish, WA (US);

Robert Geva, Cupertino, CA (US);

Assignee:

Amazon Technologies, Inc., Seattle, WA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/1081 (2016.01); G06F 9/30 (2018.01); G06F 13/16 (2006.01); G06N 3/04 (2023.01); G06N 3/0464 (2023.01);
U.S. Cl.
CPC ...
G06F 12/1081 (2013.01); G06F 9/30043 (2013.01); G06F 13/1668 (2013.01); G06N 3/04 (2013.01); G06N 3/0464 (2023.01);
Abstract

A computer-implemented method includes generating or receiving instruction code for executing by a computing device to implement a neural network model, where the instruction code includes a plurality of direct memory access (DMA) instructions for data transferring between a local memory of an accelerator of the computing device and a system memory of the computing device; modifying the instruction code to arrange sources or destinations of a group of DMA instructions of the plurality of DMA instructions into a contiguous block in the local memory; and replacing the group of DMA instructions with a single DMA instruction, wherein a source address or a destination address of the single DMA instruction is the contiguous block of the local memory.


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