The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2026

Filed:

Oct. 29, 2024
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Weibiao Zhang, Saratoga, CA (US);

Ke Yun, Cupertino, CA (US);

Bruno W. Garlepp, Sunnyvale, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/567 (2006.01); G05F 1/46 (2006.01); G05F 1/575 (2006.01); G05F 3/20 (2006.01); G05F 3/24 (2006.01); G05F 3/26 (2006.01);
U.S. Cl.
CPC ...
G05F 1/468 (2013.01); G05F 1/567 (2013.01); G05F 1/575 (2013.01); G05F 3/205 (2013.01); G05F 3/245 (2013.01); G05F 3/262 (2013.01);
Abstract

Techniques for generating reference voltages and reference currents from a supply voltage are disclosed. A disclosed reference voltage and reference current generator circuit includes a combination of transistor (e.g., MOS) devices and interconnect resistors. The interconnect resistors have temperature coefficients that are selected to negate temperature sensitive effects in the transistor devices due to electron mobility temperature behavior in the transistor devices. The interconnect resistors may be implemented as resistor stacks that include interconnected metal layers separated by electrically insulating layers.


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