The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2026

Filed:

May. 11, 2022
Applicants:

Beijing Boe Technology Development Co., Ltd., Beijing, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Wei Guo, Beijing, CN;

Hu Meng, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/67 (2025.01); H10D 30/01 (2025.01); H10K 85/20 (2023.01); H10P 14/40 (2026.01);
U.S. Cl.
CPC ...
H10D 30/6756 (2025.01); H10D 30/0314 (2025.01); H10D 30/0321 (2025.01); H10D 30/6713 (2025.01); H10D 30/6729 (2025.01); H10D 30/673 (2025.01); H10D 30/6739 (2025.01); H10K 85/211 (2023.02); H10P 14/40 (2026.01);
Abstract

A thin film transistor includes: a substrate; a gate electrode; an active layer including a first active pattern and a second active pattern, where the first active pattern includes a first active sub-pattern, the first active sub-pattern comprises a first active region and a first source-drain contact region, the first source-drain contact region is connected to the second active pattern through the first active region, the first active pattern includes a material of at least one of a metal oxide semiconductor, low-temperature polycrystalline silicon, and amorphous silicon, and the second active pattern includes a material of a semiconductor carbon nanotube; a source electrode and a drain electrode spaced apart from each other and connected to the active layer; and a passivation layer on a side of the second active pattern distal to the substrate. A method for manufacturing the thin film transistor and a circuit are further provided.


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