Three-dimensional semiconductor memory device with diffusion stop layer and electronic system including the same

Abstract

Disclosed are 3D semiconductor memory devices and electronic systems including the same. The 3D semiconductor memory device comprises a stack structure including interlayer dielectric layers and gate electrodes that are alternately and repeatedly stacked on a substrate, vertical channel structures in vertical channel holes that penetrate the stack structure and each including a charge storage layer, a tunneling dielectric layer, and a vertical semiconductor pattern that are sequentially cover an inner sidewall of each of the vertical channel holes, and a diffusion stop layer between the gate electrodes and the charge storage layer. The diffusion stop layer includes a dielectric material having a dielectric constant of greater than about 0 and less than about 5.