The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2026

Filed:

Oct. 09, 2020
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Matthew Beck, Danbury, CT (US);

Joseph Allen Glick, Putnam Valley, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03H 7/46 (2006.01); G06N 10/40 (2022.01); H03H 7/01 (2006.01); H03H 7/09 (2006.01); H10N 60/12 (2023.01); H10N 60/80 (2023.01);
U.S. Cl.
CPC ...
H03H 7/46 (2013.01); G06N 10/40 (2022.01); H03H 7/0123 (2013.01); H03H 7/09 (2013.01); H03H 7/1775 (2013.01); H03H 7/465 (2013.01); H10N 60/12 (2023.02); H10N 60/805 (2023.02);
Abstract

A superconducting circuit includes a first port and a plurality of second ports; a plurality of filter poles, each filter pole comprising an inductor and a capacitor connected in parallel, between the first port and a second port in the plurality of second ports; an admittance inverter comprising at least one of a coupling capacitor, a coupling inductor, and a Josephson junction, the admittance inverter linking two successive filter poles together. The plurality of filter poles and associated admittance inverters define a plurality of current branches so that, when operating as a demultiplexer, an input electrical current input though the first port is routed to a selected one of the plurality of the plurality of second ports by an application of a first set of magnetic flux biases.


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