The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 26, 2026
Filed:
Dec. 12, 2025
Korea University Research and Business Foundation, Sejong Campus, Sejong, KR;
Jae Woo Lee, Sejong, KR;
Sanghyeok Kim, Sejong, KR;
Inkyu Yoon, Sejong, KR;
Somi Lee, Sejong, KR;
Dong Hyun Kim, Sejong, KR;
Korea University Research and Business Foundation, Sejong, KR;
Abstract
Disclosed is a method and apparatus for optimizing a program voltage and an erase voltage of a charge-trap memory device through a three-dimensional (3D) trap analysis that may apply each of different trap control voltages to the memory device and measure low-frequency noises of the memory device respectively corresponding to the trap control voltages, may extract trap distributions in the memory device for the trap control voltages based on the low-frequency noises, respectively, and may analyze the trap distributions according to depths of the memory device, and detect a trap control voltage having a maximum trap distribution in a charge trap layer of the memory device, thereby detecting at least one of an optimal program voltage and erase voltage for the memory device.