The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2026

Filed:

Aug. 30, 2024
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Shinichi Kanno, Tokyo, JP;

Yuki Sasaki, Kamakura, JP;

Kensaku Yamaguchi, Kawasaki, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0292 (2013.01); G06F 12/0246 (2013.01);
Abstract

A memory system includes a non-volatile memory and a controller that is configured to: write N pieces of address translation information repeatedly in a first block according to a first order; write the N pieces of address translation information repeatedly in a second block of the non-volatile memory according to a second order that is offset from the first order by N/2; write an update log in the first and second blocks each time one of the N pieces is written; and in response to power to the memory system being restored after shutdown, read from the first block, N/2 pieces of address translation information and N/2 update logs last written thereinto, read from the second block, N/2 pieces of address translation information and N/2 update logs last written thereinto, and reconstruct a logical-to-physical address translation table from the information read from the non-volatile memory.


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