Prediction circuitry using a prediction table providing a skip-fetch-instruction entry

Abstract

An apparatus comprises fetch circuitry configured to fetch instructions for processing by processing circuitry, and prediction circuitry configured to identify instructions to be fetched by the fetch circuitry. The prediction circuitry is configured to perform a lookup in a prediction table based on an address of a first instruction, and in response to the lookup identifying that the prediction table includes a skip-fetch-instruction entry corresponding to the address of the first instruction, the skip-fetch-instruction entry specifying information identifying an operation represented by at least one execute-without-fetch instruction subsequent in program order to the first instruction, the prediction circuitry is configured to control the fetch circuitry to skip fetching of the at least one execute-without-fetch instruction, and control the processing circuitry to perform the operation represented by the at least one execute-without-fetch instruction despite fetching of the at least one execute-without-fetch instruction being skipped.