The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 19, 2026
Filed:
Sep. 17, 2020
Applicant:
Alibaba Group Holding Limited, Georgetown, KY;
Inventors:
Dimin Niu, Sunnyvale, CA (US);
Wei Han, Sunnyvale, CA (US);
Tianchan Guan, Shanghai, CN;
Yuhao Wang, Sunnyvale, CA (US);
Shuangchen Li, Sunnyvale, CA (US);
Hongzhong Zheng, Los Gatos, CA (US);
Assignee:
Alibaba Group Holding Limited, Grand Cayman, KY;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2023.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H10B 80/00 (2023.01);
U.S. Cl.
CPC ...
H01L 25/0652 (2013.01); H01L 23/49816 (2013.01); H01L 23/49827 (2013.01); H01L 23/49838 (2013.01); H01L 24/16 (2013.01); H10B 80/00 (2023.02); H01L 2224/16146 (2013.01); H01L 2224/16221 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14361 (2013.01);
Abstract
Aspects of the present technology are directed toward three-dimensional (3D) stacked processing systems characterized by high memory capacity, high memory bandwidth, low power consumption and small form factor. The 3D stacked processing systems include a plurality of processor chiplets and input/output circuits directly coupled to each of the plurality of processor chiplets.