The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2026

Filed:

Oct. 28, 2022
Applicant:

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Renquan Gu, Beijing, CN;

Qi Yao, Beijing, CN;

Jaiil Ryu, Beijing, CN;

Zhiwei Liang, Beijing, CN;

Yingwei Liu, Beijing, CN;

Wusheng Li, Beijing, CN;

Muxin Di, Beijing, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10K 59/131 (2023.01); H10K 59/126 (2023.01); H10K 59/12 (2023.01);
U.S. Cl.
CPC ...
H10K 59/131 (2023.02); H10K 59/126 (2023.02); H10K 59/1201 (2023.02);
Abstract

An array substrate and a manufacturing method thereof, a display device and a manufacturing method thereof are provided, which belong to the technical field of display. The array substrate includes: an interposer substrate, a fan-out region and a thin-film transistor disposed on one side of the interposer substrate, and a bonding connection line disposed on the other side of the interposer substrate. The bonding connection line includes a first lead and a second lead that are insulated from each other. The interposer substrate is provided with a first interposer via hole and a second interposer via hole. The first lead is electrically connected to the thin-film transistor by a conductive structure in the first interposer via hole and the fan-out region, and the second lead is electrically connected to the thin-film transistor by a conductive structure in the second interposer via hole and the fan-out region.


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