The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2026

Filed:

Jun. 19, 2020
Applicant:

Aledia, Echirolles, FR;

Inventors:

Pierre Tchoulfian, Grenoble, FR;

Pamela Rueda Fonseca, Fontaine, FR;

Wei Sin Tan, Grenoble, FR;

Assignee:

ALEDIA, Echirolles, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10H 20/01 (2025.01); H10H 20/812 (2025.01);
U.S. Cl.
CPC ...
H10H 20/0137 (2025.01); H10H 20/812 (2025.01); H10H 20/0362 (2025.01);
Abstract

A method for local removal of semiconductor wires (SW) including the following steps: —Provide a stack of layers including at least a substrate, a nucleation layer, a growth masking layer, and a layer including SW being grown from the nucleation layer through the growth masking layer, —Encapsulate the SW with an encapsulation layer so as to form a composite layer including SW and encapsulating material, —Pattern a hard mask on the composite layer, so as to expose regions of the composite layer, —Perform anisotropic etching of the composite layer in the exposed regions, the anisotropic etching having a selectivity S:Sbetween semiconductor-based material and encapsulating material such as 0.9:1<S:S<1.1:1.


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