The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2026

Filed:

Oct. 31, 2024
Applicant:

Arista Networks, Inc., Santa Clara, CA (US);

Inventor:

Adrian Donald Fettes, Vancouver, CA;

Assignee:

ARISTA NETWORKS, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 47/80 (2022.01); G06F 17/16 (2006.01);
U.S. Cl.
CPC ...
H04L 47/801 (2013.01); G06F 17/16 (2013.01); H04L 47/805 (2013.01);
Abstract

Techniques for allocating packet processor resources in a network device using linear programming (LP) are provided. In certain embodiments, these techniques enable the construction of an LP problem formulation for determining, at the time of receiving a TCAM profile specifying j contexts and i TCAM features to be enabled with respect to the j contexts, whether a feasible assignment of the i TCAM features to the cycles of the network device's packet processor exists (and if so, what that assignment is).


Find Patent Forward Citations

Fettes, Adrian. (2026). Packet processor resource allocation using linear programming (U.S. Patent No. 12634245). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12634245

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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