The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 12, 2026
Filed:
Aug. 04, 2023
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Inventor:
Jongyoun Kim, Suwon-si, KR;
Assignee:
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 70/685 (2026.01); H10W 70/60 (2026.01); H10W 70/65 (2026.01); H10W 72/00 (2026.01); H10W 72/30 (2026.01); H10W 74/00 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 70/685 (2026.01); H10W 70/65 (2026.01); H10W 90/00 (2026.01); H10W 70/60 (2026.01); H10W 72/331 (2026.01); H10W 72/877 (2026.01); H10W 72/884 (2026.01); H10W 74/00 (2026.01); H10W 90/722 (2026.01); H10W 90/724 (2026.01); H10W 90/734 (2026.01); H10W 90/754 (2026.01);
Abstract
A semiconductor package includes a first redistribution layer, a first semiconductor chip on the first redistribution layer, a mold layer covering a side surface of the first semiconductor chip and a top surface of the first redistribution layer and having an upper surface coplanar with an upper surface of the first semiconductor chip, a metal layer on the first semiconductor chip and the mold layer to be in contact with upper surfaces of the mold layer and the first semiconductor chip, and a second redistribution layer on the metal layer.