The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2026

Filed:

Sep. 24, 2024
Applicant:

Wenzhou University, Zhejiang, CN;

Inventors:

Gang Li, Zhejiang, CN;

Pengjun Wang, Zhejiang, CN;

Junjie Zhou, Zhejiang, CN;

Hui Li, Zhejiang, CN;

Hao Ye, Zhejiang, CN;

Assignee:

Wenzhou University, Zhejiang, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/17768 (2020.01); H03K 19/0944 (2006.01); H03K 19/21 (2006.01);
U.S. Cl.
CPC ...
H03K 19/17768 (2013.01); H03K 19/0944 (2013.01); H03K 19/21 (2013.01);
Abstract

A strong PUF circuit capable of implementing multi-bit parallel XOR operations comprises a presetting module, an interleaving module, a cascading module and a control module, wherein the control module controls the operating mode of the strong PUF circuit capable of implementing multi-bit parallel XOR operations to allow the strong PUF circuit capable of implementing multi-bit parallel XOR operations to operate in a PUF mode, a logic operation mode or a power control mode; when operating in the PUF mode, the strong PUF circuit capable of implementing multi-bit parallel XOR operations functions as a PUF circuit; when operating in the logic operation mode, the strong PUF circuit capable of implementing multi-bit parallel XOR operations realizes an XOR operation logic function; and when operating in the power control mode, the strong PUF circuit capable of implementing multi-bit parallel XOR operations realizes low-power standby.


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