The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2026

Filed:

May. 01, 2024
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Subho Chatterjee, San Diego, CA (US);

Xiao Chen, San Diego, CA (US);

Arun Ramamurthy, San Diego, CA (US);

Chulmin Jung, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 11/418 (2006.01); G11C 11/419 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G11C 11/418 (2013.01);
Abstract

A memory such as for a high-speed microprocessor cache includes a first bank of bitcells and a second bank of bitcells. The banks are read from in a pipelined fashion with respect to cycles of a system clock signal such that a first read operation to the first bank is initiated with respect to a first cycle of the system clock signal whereas a second read operation to the second bank is initiated with respect to a second cycle of the system clock that is consecutive to the first clock cycle. A multiplexer selects between latched bits from the read operations responsive to cycles of the system clock signal.


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