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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12626665 B1

PDFFull Text
Date of Patent:
May. 12, 2026

Filed:

Oct. 25, 2024

Display device having a plurality of sub-pixels for outputting different viewing angle

Applicant:

Lg Display Co., Ltd., Seoul, KR;

Inventors:

Yoonji Choi, Paju-si, KR;

Haksu Kim, Paju-si, KR;

Assignee:

LG DISPLAY CO., LTD., Seoul, KR;

Attorney:

Birch, Stewart, Kolasch & Birch, LLP

Primary Examiner:

Long D Pham

Int. Cl.
CPC ...
G09G 3/3258 (2016.01); G09G 3/3266 (2016.01); G09G 3/3275 (2016.01); H10K 59/122 (2023.01); H10K 59/123 (2023.01); H10K 59/127 (2023.01); H10K 59/80 (2023.01);
U.S. Cl.
CPC ...
G09G 3/3258 (2013.01); G09G 3/3266 (2013.01); G09G 3/3275 (2013.01); H10K 59/122 (2023.02); H10K 59/123 (2023.02); H10K 59/127 (2023.02); H10K 59/80518 (2023.02); H10K 59/80524 (2023.02); H10K 59/873 (2023.02); H10K 59/879 (2023.02); G09G 2300/0443 (2013.01); G09G 2300/0809 (2013.01);
Abstract

A display device can include a first mode sub-pixel having a first viewing angle and including a first emitting element, a second mode sub-pixel having a second viewing angle and including a second emitting element, a driving transistor connected to the first emitting element or the second emitting element, a first control transistor configured to connect the first emitting element to the driving transistor by being controlled by a mode selecting signal, a second control transistor configured to connect the second emitting element to the driving transistor by being controlled by the mode selecting signal, and a mode control line configured to apply the mode selection signal to the first switching transistor and the second switching transistor. The first control transistor and the second control transistor are applied with the mode selection signal from the same mode control line.

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