The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2026

Filed:

May. 24, 2022
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventors:

Janardhana Reddy Naredula, Hyderabad, IN;

Naresh Kumar Bade, Hyderabad, IN;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 9/5016 (2013.01); G06F 9/5038 (2013.01); G06F 9/505 (2013.01);
Abstract

The present disclosure relates to systems, methods, and computer-readable media for utilizing a new memory allocation function library called PmemMalloc. For example, the PmemMalloc library allocates pre-allocated, partitioned, and fixed shared memory blocks. In addition, by utilizing the PmemMalloc library, the memory allocation system described herein overcomes problems with persistence and enumeration that encumber existing malloc libraries. Indeed, the PmemMalloc library enables the memory allocation system to perform servicing computation in parallel across multiple CPU cores/threads, distribute computation equally among threads, prioritize servicing, among other improvements. Notably, the PmemMalloc library provides major constructs (e.g., persistence, enumeration, and debuggability) not available existing malloc libraries. Additionally, as detailed in this disclosure, the PmemMalloc library migrates various computations out of application-based packet processing to memory block-based deferred enumeration, which improves both packet processing and efficient use of CPU cores on a computing device.


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Naredula, Janardhana. (2026). Packet processing computations utilizing a pre-allocated memory function (U.S. Patent No. 12625729). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12625729

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