The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2026

Filed:

Aug. 15, 2024
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Jiwang Lee, San Jose, CA (US);

Jaewon Lee, San Jose, CA (US);

PO-Chien Chiang, Hsinchu, TW;

Hsuche Nee, Zhubei, TW;

Wen-Hung Lo, Saratoga, CA (US);

Michael I. Halfen, San Francisco, CA (US);

Abhishek Dhir, Oakville, CA;

Zhonghua Li, San Jose, CA (US);

Assignee:

NVIDIA Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0655 (2013.01); G06F 3/0625 (2013.01); G06F 3/0673 (2013.01);
Abstract

Systems and methods are herein disclosed that relate to generating read enabling windows in a multi-rank memory system that includes a memory controller connected to a plurality of memory ranks via a shared physical channel. The systems and methods disclosed herein provide for opening and closing read enabling windows for a memory controller in response to processing of data strobe signals output by a memory rank connected to the memory controller. By processing of the data strobe signals, a preamble can be detected that precedes a data transmission from a memory rank to the memory controller and a post-amble that follows the data transmission can also be detected. Detection of the preamble triggers opening of the read enabling window, and detection of the post-amble triggers closing of the read enabling window.


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