The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2026

Filed:

Jun. 08, 2022
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Matthew J. Cheung, Castro Valley, CA (US);

Colin T. Mclain, San Jose, CA (US);

Assignee:

APPLE INC., Cupertino, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/16 (2006.01); H01H 13/06 (2006.01); H01H 13/14 (2006.01); H04B 1/38 (2015.01); H04B 1/44 (2006.01);
U.S. Cl.
CPC ...
G06F 1/1698 (2013.01); G06F 1/1656 (2013.01); G06F 1/1683 (2013.01); H01H 13/06 (2013.01); H01H 13/14 (2013.01); H04B 1/44 (2013.01); H04B 2001/3894 (2013.01);
Abstract

An electronic device can include: a housing defining an exterior surface and an internal volume, the exterior surface defining a recess having a base portion and a sidewall, the housing forming a continuous component; a button body positioned within the recess; an emissive object attached to the button body, the emissive object being movable between a first position and a second position and configured to emit electromagnetic radiation; a first sensor positioned within the internal volume and configured to generate a first signal in response to detecting electromagnetic radiation in the first position; a second sensor positioned within the internal volume and configured to generate a second signal; a processor positioned within the internal volume, and in electrical communication with the first sensor and the second sensor; and a memory having electronic instructions that cause the processor to respond to the first signal and the second signal.


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