The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2026

Filed:

May. 02, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventor:

Seungmin Kim, Asan-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 25/18 (2023.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 23/3107 (2013.01); H01L 23/3142 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 25/0652 (2013.01); H01L 25/0655 (2013.01); H01L 25/0657 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/181 (2013.01); H01L 2924/3511 (2013.01);
Abstract

A semiconductor package is provided. The semiconductor package includes: a package substrate; a first semiconductor chip mounted on the package substrate; a second semiconductor chip mounted on the package substrate; an adhesive film provided on an upper surface the first semiconductor chip and an upper surface of the second semiconductor chip; and a third semiconductor chip attached to the first semiconductor chip, the second semiconductor chip by the adhesive film. The first and second semiconductor chips have different heights, and a thickness of the adhesive film at a portion thereof contacting the first semiconductor chip is different from a thickness of the adhesive film at a portion thereof contacting the second semiconductor chip.


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