The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2026

Filed:

Feb. 16, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Sangnam Jeong, Hwaseong-si, KR;

Sangsub Song, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H05K 1/181 (2026.01); H10B 80/00 (2023.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 23/49816 (2013.01); H05K 1/181 (2013.01); H10B 80/00 (2023.02); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/33 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 2224/16237 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/33181 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48105 (2013.01); H01L 2224/48145 (2013.01); H01L 2224/48228 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73215 (2013.01); H01L 2224/73265 (2013.01); H05K 2201/09227 (2013.01); H05K 2201/09236 (2013.01); H05K 2201/10159 (2013.01); H05K 2201/10734 (2013.01);
Abstract

A semiconductor package includes: a package substrate including a plurality of insulating layers and a plurality of metal pattern layers respectively disposed on the plurality of insulating layers, wherein each of the plurality of metal pattern layers has an interconnection layer; at least one semiconductor chip disposed on an upper surface of the package substrate, and connected to the interconnection layer; contact pads disposed on a lower surface of the package substrate, and connected to the interconnection layer; and non-contact pads disposed on the lower surface of the package substrate, and insulated from the interconnection layer, wherein a lowermost metal pattern layer among the plurality of metal pattern layers has a first open region at least partially overlapping at least one non-contact pad among the non-contact pads, in a direction perpendicular to the upper surface of the package substrate.


Find Patent Forward Citations

Jeong, Sangnam. (2026). Semiconductor package including metal pattern layer with open region which overlaps non-contact pad (U.S. Patent No. 12622296). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12622296

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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