The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 2026
Filed:
Apr. 18, 2023
Creeled, Inc., Durham, NC (US);
Michael Check, Holly Springs, NC (US);
Justin White, Morrisville, NC (US);
Steven Wuester, Wake Forest, NC (US);
Kevin Haberern, Cary, NC (US);
Colin Blakely, Raleigh, NC (US);
Jesse Reiherzer, Raleigh, NC (US);
CreeLED, Inc., Durham, NC (US);
Abstract
Solid-state lighting devices including light-emitting diode (LED) chips and more particularly interconnect structures for improved LED chip performance are disclosed. Interconnect structures are disclosed within LED chips that are structured to increase perimeter contact areas within localized LED chip areas without substantial increases to overall areas occupied by the interconnect structures. By increasing contact perimeters of interconnects within a certain area, increased current injection efficiency may be provided. Interconnect structures for increased current injection are disclosed for both n-type layers and p-type layers. Interconnect structures may include patterned dielectric materials within interconnect openings and corresponding interconnects that are formed around the patterned dielectric materials. Additional interconnect structures include nested patterns and extensions that provide enhanced adhesion along LED chip perimeters.