The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 2026
Filed:
Aug. 30, 2024
Omnivision Technologies, Inc., Santa Clara, CA (US);
Ikuko Inoue, Kanagawa, JP;
Cynthia Sun Yee Lee, Santa Clara, CA (US);
OMNIVISION TECHNOLOGIES, INC., Santa Clara, CA (US);
Abstract
A multilayer wiring layer is laminated over a wafer. Wirings formed in the multilayer wiring layer include a capacitance control wiring and an FD-SF wiring. The capacitance control wiring is capacitively coupled with a floating diffusion, and a boost signal which increases a potential of the floating diffusion is transmitted on the capacitance control wiring. The FD-SF wiring connects the floating diffusion and a source follower transistor. The multilayer wiring layer includes an FD connection layer and a first control line layer. The FD-SF wiring is formed in the FD connection layer. The capacitance control wiring is formed in the first control line layer. In the multilayer wiring layer, the first control line layer is the wiring layer closest to the FD connection layer.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile